1 /// Types and constants of MIPS architecture
2 module capstone.mips;
3 
4 import std.conv: to;
5 
6 import capstone.api;
7 import capstone.capstone;
8 import capstone.detail;
9 import capstone.instruction;
10 import capstone.instructiongroup;
11 import capstone.internal;
12 import capstone.register;
13 import capstone.utils;
14 
15 /// Architecture-specific Register variant
16 class MipsRegister : RegisterImpl!MipsRegisterId {
17     package this(in Capstone cs, in int id) {
18         super(cs, id);
19     }
20 }
21 
22 /// Architecture-specific InstructionGroup variant
23 class MipsInstructionGroup : InstructionGroupImpl!MipsInstructionGroupId {
24     package this(in Capstone cs, in int id) {
25         super(cs, id);
26     }
27 }
28 
29 /// Architecture-specific Detail variant
30 class MipsDetail : DetailImpl!(MipsRegister, MipsInstructionGroup, MipsInstructionDetail) {
31     package this(in Capstone cs, cs_detail* internal) {
32 		super(cs, internal);
33 	}
34 }
35 
36 /// Architecture-specific instruction variant
37 class MipsInstruction : InstructionImpl!(MipsInstructionId, MipsRegister, MipsDetail) {
38     package this(in Capstone cs, cs_insn* internal) {
39 		super(cs, internal);
40 	}
41 }
42 
43 /// Architecture-specific Capstone variant
44 class CapstoneMips : CapstoneImpl!(MipsInstructionId, MipsInstruction) {
45     /** Creates an architecture-specific instance with a given mode of interpretation
46     
47     Params:
48         modeFlags = The (initial) mode of interpretation, which can still be changed later on
49     */
50 	this(in ModeFlags modeFlags){
51         super(Arch.mips, modeFlags);
52     }
53 }
54 
55 /** Instruction's operand referring to memory
56 
57 This is associated with the `MipsOpType.mem` operand type
58 */
59 struct MipsOpMem {
60     MipsRegister base;   /// Base register (or `MipsRegister.invalid` if irrelevant)
61     long disp;           /// Displacement value
62 
63 	package this(in Capstone cs, mips_op_mem internal) {
64 		base = new MipsRegister(cs, internal.base);
65 		disp = internal.disp;
66 	}
67 }
68 
69 /// Union of possible operand types
70 union MipsOpValue{
71     MipsRegister reg;	/// Register
72     long imm;			/// Immediate
73     MipsOpMem mem;		/// Memory
74 }
75 
76 /// Instruction's operand
77 struct MipsOp {
78     MipsOpType type;   /// Operand type
79     SafeUnion!MipsOpValue value; /// Operand value of type `type`
80     alias value this;  /// Convenient access to value (as in original bindings)
81 
82     package this(in Capstone cs, cs_mips_op internal){
83         type = internal.type.to!MipsOpType;
84         final switch(internal.type) {
85             case MipsOpType.invalid:
86                 break;
87             case MipsOpType.reg:
88                 value.reg = new MipsRegister(cs, internal.reg);
89                 break;
90             case MipsOpType.imm:
91                 value.imm = internal.imm;
92                 break;
93             case MipsOpType.mem:
94                 value.mem = MipsOpMem(cs, internal.mem);
95                 break;
96         }
97     }
98 }
99 
100 /// MIPS-specific information about an instruction
101 struct MipsInstructionDetail {
102     MipsOp[] operands;          /// Operands for this instruction.
103 
104     package this(in Capstone cs, cs_arch_detail arch_detail){
105         auto internal = arch_detail.mips;
106         foreach(op; internal.operands[0..internal.op_count])
107             operands ~= MipsOp(cs, op);
108     }
109 }
110 
111 //=============================================================================
112 // Constants
113 //=============================================================================
114 
115 /// Operand type for instruction's operands
116 enum MipsOpType {
117     invalid = 0,  /// Invalid
118     reg,  		  /// Register operand (`MipsRegister`)
119     imm,    	  /// Immediate operand (`long`)
120     mem,       	  /// Memory operand (`MipsOpMem`)
121 }
122 
123 /// MIPS registers
124 enum MipsRegisterId {
125 	invalid = 0,
126 	// General purpose registers
127 	pc,
128 
129 	r0,
130 	r1,
131 	r2,
132 	r3,
133 	r4,
134 	r5,
135 	r6,
136 	r7,
137 	r8,
138 	r9,
139 	r10,
140 	r11,
141 	r12,
142 	r13,
143 	r14,
144 	r15,
145 	r16,
146 	r17,
147 	r18,
148 	r19,
149 	r20,
150 	r21,
151 	r22,
152 	r23,
153 	r24,
154 	r25,
155 	r26,
156 	r27,
157 	r28,
158 	r29,
159 	r30,
160 	r31,
161 
162 	// DSP registers
163 	dspccond,
164 	dspcarry,
165 	dspefi,
166 	dspoutflag,
167 	dspoutflag16_19,
168 	dspoutflag20,
169 	dspoutflag21,
170 	dspoutflag22,
171 	dspoutflag23,
172 	dsppos,
173 	dspscount,
174 
175 	// ACC registers
176 	ac0,
177 	ac1,
178 	ac2,
179 	ac3,
180 
181 	// COP registers
182 	cc0,
183 	cc1,
184 	cc2,
185 	cc3,
186 	cc4,
187 	cc5,
188 	cc6,
189 	cc7,
190 
191 	// FPU registers
192 	f0,
193 	f1,
194 	f2,
195 	f3,
196 	f4,
197 	f5,
198 	f6,
199 	f7,
200 	f8,
201 	f9,
202 	f10,
203 	f11,
204 	f12,
205 	f13,
206 	f14,
207 	f15,
208 	f16,
209 	f17,
210 	f18,
211 	f19,
212 	f20,
213 	f21,
214 	f22,
215 	f23,
216 	f24,
217 	f25,
218 	f26,
219 	f27,
220 	f28,
221 	f29,
222 	f30,
223 	f31,
224 
225 	fcc0,
226 	fcc1,
227 	fcc2,
228 	fcc3,
229 	fcc4,
230 	fcc5,
231 	fcc6,
232 	fcc7,
233 
234 	// AFPR128
235 	w0,
236 	w1,
237 	w2,
238 	w3,
239 	w4,
240 	w5,
241 	w6,
242 	w7,
243 	w8,
244 	w9,
245 	w10,
246 	w11,
247 	w12,
248 	w13,
249 	w14,
250 	w15,
251 	w16,
252 	w17,
253 	w18,
254 	w19,
255 	w20,
256 	w21,
257 	w22,
258 	w23,
259 	w24,
260 	w25,
261 	w26,
262 	w27,
263 	w28,
264 	w29,
265 	w30,
266 	w31,
267 
268 	hi,
269 	lo,
270 
271 	p0,
272 	p1,
273 	p2,
274 
275 	mpl0,
276 	mpl1,
277 	mpl2,
278 
279 	// alias registers
280 	zero = r0,
281 	at = r1,
282 	v0 = r2,
283 	v1 = r3,
284 	a0 = r4,
285 	a1 = r5,
286 	a2 = r6,
287 	a3 = r7,
288 	t0 = r8,
289 	t1 = r9,
290 	t2 = r10,
291 	t3 = r11,
292 	t4 = r12,
293 	t5 = r13,
294 	t6 = r14,
295 	t7 = r15,
296 	s0 = r16,
297 	s1 = r17,
298 	s2 = r18,
299 	s3 = r19,
300 	s4 = r20,
301 	s5 = r21,
302 	s6 = r22,
303 	s7 = r23,
304 	t8 = r24,
305 	t9 = r25,
306 	k0 = r26,
307 	k1 = r27,
308 	gp = r28,
309 	sp = r29,
310 	fp = r30,
311 	s8 = r30,
312 	ra = r31,
313 
314 	hi0 = ac0,
315 	hi1 = ac1,
316 	hi2 = ac2,
317 	hi3 = ac3,
318 
319 	lo0 = hi0,
320 	lo1 = hi1,
321 	lo2 = hi2,
322 	lo3 = hi3,
323 }
324 
325 /// MIPS instructions
326 enum MipsInstructionId {
327 	invalid = 0,
328 
329 	absq_s,
330 	add,
331 	addiupc,
332 	addiur1sp,
333 	addiur2,
334 	addius5,
335 	addiusp,
336 	addqh,
337 	addqh_r,
338 	addq,
339 	addq_s,
340 	addsc,
341 	adds_a,
342 	adds_s,
343 	adds_u,
344 	addu16,
345 	adduh,
346 	adduh_r,
347 	addu,
348 	addu_s,
349 	addvi,
350 	addv,
351 	addwc,
352 	add_a,
353 	addi,
354 	addiu,
355 	align_,
356 	aluipc,
357 	and,
358 	and16,
359 	andi16,
360 	andi,
361 	append,
362 	asub_s,
363 	asub_u,
364 	aui,
365 	auipc,
366 	aver_s,
367 	aver_u,
368 	ave_s,
369 	ave_u,
370 	b16,
371 	baddu,
372 	bal,
373 	balc,
374 	balign,
375 	bbit0,
376 	bbit032,
377 	bbit1,
378 	bbit132,
379 	bc,
380 	bc0f,
381 	bc0fl,
382 	bc0t,
383 	bc0tl,
384 	bc1eqz,
385 	bc1f,
386 	bc1fl,
387 	bc1nez,
388 	bc1t,
389 	bc1tl,
390 	bc2eqz,
391 	bc2f,
392 	bc2fl,
393 	bc2nez,
394 	bc2t,
395 	bc2tl,
396 	bc3f,
397 	bc3fl,
398 	bc3t,
399 	bc3tl,
400 	bclri,
401 	bclr,
402 	beq,
403 	beqc,
404 	beql,
405 	beqz16,
406 	beqzalc,
407 	beqzc,
408 	bgec,
409 	bgeuc,
410 	bgez,
411 	bgezal,
412 	bgezalc,
413 	bgezall,
414 	bgezals,
415 	bgezc,
416 	bgezl,
417 	bgtz,
418 	bgtzalc,
419 	bgtzc,
420 	bgtzl,
421 	binsli,
422 	binsl,
423 	binsri,
424 	binsr,
425 	bitrev,
426 	bitswap,
427 	blez,
428 	blezalc,
429 	blezc,
430 	blezl,
431 	bltc,
432 	bltuc,
433 	bltz,
434 	bltzal,
435 	bltzalc,
436 	bltzall,
437 	bltzals,
438 	bltzc,
439 	bltzl,
440 	bmnzi,
441 	bmnz,
442 	bmzi,
443 	bmz,
444 	bne,
445 	bnec,
446 	bnegi,
447 	bneg,
448 	bnel,
449 	bnez16,
450 	bnezalc,
451 	bnezc,
452 	bnvc,
453 	bnz,
454 	bovc,
455 	bposge32,
456 	break_,
457 	break16,
458 	bseli,
459 	bsel,
460 	bseti,
461 	bset,
462 	bz,
463 	beqz,
464 	b,
465 	bnez,
466 	bteqz,
467 	btnez,
468 	cache,
469 	ceil,
470 	ceqi,
471 	ceq,
472 	cfc1,
473 	cfcmsa,
474 	cins,
475 	cins32,
476 	class_,
477 	clei_s,
478 	clei_u,
479 	cle_s,
480 	cle_u,
481 	clo,
482 	clti_s,
483 	clti_u,
484 	clt_s,
485 	clt_u,
486 	clz,
487 	cmpgdu,
488 	cmpgu,
489 	cmpu,
490 	cmp,
491 	copy_s,
492 	copy_u,
493 	ctc1,
494 	ctcmsa,
495 	cvt,
496 	c,
497 	cmpi,
498 	dadd,
499 	daddi,
500 	daddiu,
501 	daddu,
502 	dahi,
503 	dalign,
504 	dati,
505 	daui,
506 	dbitswap,
507 	dclo,
508 	dclz,
509 	ddiv,
510 	ddivu,
511 	deret,
512 	dext,
513 	dextm,
514 	dextu,
515 	di,
516 	dins,
517 	dinsm,
518 	dinsu,
519 	div,
520 	divu,
521 	div_s,
522 	div_u,
523 	dlsa,
524 	dmfc0,
525 	dmfc1,
526 	dmfc2,
527 	dmod,
528 	dmodu,
529 	dmtc0,
530 	dmtc1,
531 	dmtc2,
532 	dmuh,
533 	dmuhu,
534 	dmul,
535 	dmult,
536 	dmultu,
537 	dmulu,
538 	dotp_s,
539 	dotp_u,
540 	dpadd_s,
541 	dpadd_u,
542 	dpaqx_sa,
543 	dpaqx_s,
544 	dpaq_sa,
545 	dpaq_s,
546 	dpau,
547 	dpax,
548 	dpa,
549 	dpop,
550 	dpsqx_sa,
551 	dpsqx_s,
552 	dpsq_sa,
553 	dpsq_s,
554 	dpsub_s,
555 	dpsub_u,
556 	dpsu,
557 	dpsx,
558 	dps,
559 	drotr,
560 	drotr32,
561 	drotrv,
562 	dsbh,
563 	dshd,
564 	dsll,
565 	dsll32,
566 	dsllv,
567 	dsra,
568 	dsra32,
569 	dsrav,
570 	dsrl,
571 	dsrl32,
572 	dsrlv,
573 	dsub,
574 	dsubu,
575 	ehb,
576 	ei,
577 	eret,
578 	ext,
579 	extp,
580 	extpdp,
581 	extpdpv,
582 	extpv,
583 	extrv_rs,
584 	extrv_r,
585 	extrv_s,
586 	extrv,
587 	extr_rs,
588 	extr_r,
589 	extr_s,
590 	extr,
591 	exts,
592 	exts32,
593 	abs,
594 	fadd,
595 	fcaf,
596 	fceq,
597 	fclass,
598 	fcle,
599 	fclt,
600 	fcne,
601 	fcor,
602 	fcueq,
603 	fcule,
604 	fcult,
605 	fcune,
606 	fcun,
607 	fdiv,
608 	fexdo,
609 	fexp2,
610 	fexupl,
611 	fexupr,
612 	ffint_s,
613 	ffint_u,
614 	ffql,
615 	ffqr,
616 	fill,
617 	flog2,
618 	floor,
619 	fmadd,
620 	fmax_a,
621 	fmax,
622 	fmin_a,
623 	fmin,
624 	mov,
625 	fmsub,
626 	fmul,
627 	mul,
628 	neg,
629 	frcp,
630 	frint,
631 	frsqrt,
632 	fsaf,
633 	fseq,
634 	fsle,
635 	fslt,
636 	fsne,
637 	fsor,
638 	fsqrt,
639 	sqrt,
640 	fsub,
641 	sub,
642 	fsueq,
643 	fsule,
644 	fsult,
645 	fsune,
646 	fsun,
647 	ftint_s,
648 	ftint_u,
649 	ftq,
650 	ftrunc_s,
651 	ftrunc_u,
652 	hadd_s,
653 	hadd_u,
654 	hsub_s,
655 	hsub_u,
656 	ilvev,
657 	ilvl,
658 	ilvod,
659 	ilvr,
660 	ins,
661 	insert,
662 	insv,
663 	insve,
664 	j,
665 	jal,
666 	jalr,
667 	jalrs16,
668 	jalrs,
669 	jals,
670 	jalx,
671 	jialc,
672 	jic,
673 	jr,
674 	jr16,
675 	jraddiusp,
676 	jrc,
677 	jalrc,
678 	lb,
679 	lbu16,
680 	lbux,
681 	lbu,
682 	ld,
683 	ldc1,
684 	ldc2,
685 	ldc3,
686 	ldi,
687 	ldl,
688 	ldpc,
689 	ldr,
690 	ldxc1,
691 	lh,
692 	lhu16,
693 	lhx,
694 	lhu,
695 	li16,
696 	ll,
697 	lld,
698 	lsa,
699 	luxc1,
700 	lui,
701 	lw,
702 	lw16,
703 	lwc1,
704 	lwc2,
705 	lwc3,
706 	lwl,
707 	lwm16,
708 	lwm32,
709 	lwpc,
710 	lwp,
711 	lwr,
712 	lwupc,
713 	lwu,
714 	lwx,
715 	lwxc1,
716 	lwxs,
717 	li,
718 	madd,
719 	maddf,
720 	maddr_q,
721 	maddu,
722 	maddv,
723 	madd_q,
724 	maq_sa,
725 	maq_s,
726 	maxa,
727 	maxi_s,
728 	maxi_u,
729 	max_a,
730 	max,
731 	max_s,
732 	max_u,
733 	mfc0,
734 	mfc1,
735 	mfc2,
736 	mfhc1,
737 	mfhi,
738 	mflo,
739 	mina,
740 	mini_s,
741 	mini_u,
742 	min_a,
743 	min,
744 	min_s,
745 	min_u,
746 	mod,
747 	modsub,
748 	modu,
749 	mod_s,
750 	mod_u,
751 	move,
752 	movep,
753 	movf,
754 	movn,
755 	movt,
756 	movz,
757 	msub,
758 	msubf,
759 	msubr_q,
760 	msubu,
761 	msubv,
762 	msub_q,
763 	mtc0,
764 	mtc1,
765 	mtc2,
766 	mthc1,
767 	mthi,
768 	mthlip,
769 	mtlo,
770 	mtm0,
771 	mtm1,
772 	mtm2,
773 	mtp0,
774 	mtp1,
775 	mtp2,
776 	muh,
777 	muhu,
778 	muleq_s,
779 	muleu_s,
780 	mulq_rs,
781 	mulq_s,
782 	mulr_q,
783 	mulsaq_s,
784 	mulsa,
785 	mult,
786 	multu,
787 	mulu,
788 	mulv,
789 	mul_q,
790 	mul_s,
791 	nloc,
792 	nlzc,
793 	nmadd,
794 	nmsub,
795 	nor,
796 	nori,
797 	not16,
798 	not,
799 	or,
800 	or16,
801 	ori,
802 	packrl,
803 	pause,
804 	pckev,
805 	pckod,
806 	pcnt,
807 	pick,
808 	pop,
809 	precequ,
810 	preceq,
811 	preceu,
812 	precrqu_s,
813 	precrq,
814 	precrq_rs,
815 	precr,
816 	precr_sra,
817 	precr_sra_r,
818 	pref,
819 	prepend,
820 	raddu,
821 	rddsp,
822 	rdhwr,
823 	replv,
824 	repl,
825 	rint,
826 	rotr,
827 	rotrv,
828 	round,
829 	sat_s,
830 	sat_u,
831 	sb,
832 	sb16,
833 	sc,
834 	scd,
835 	sd,
836 	sdbbp,
837 	sdbbp16,
838 	sdc1,
839 	sdc2,
840 	sdc3,
841 	sdl,
842 	sdr,
843 	sdxc1,
844 	seb,
845 	seh,
846 	seleqz,
847 	selnez,
848 	sel,
849 	seq,
850 	seqi,
851 	sh,
852 	sh16,
853 	shf,
854 	shilo,
855 	shilov,
856 	shllv,
857 	shllv_s,
858 	shll,
859 	shll_s,
860 	shrav,
861 	shrav_r,
862 	shra,
863 	shra_r,
864 	shrlv,
865 	shrl,
866 	sldi,
867 	sld,
868 	sll,
869 	sll16,
870 	slli,
871 	sllv,
872 	slt,
873 	slti,
874 	sltiu,
875 	sltu,
876 	sne,
877 	snei,
878 	splati,
879 	splat,
880 	sra,
881 	srai,
882 	srari,
883 	srar,
884 	srav,
885 	srl,
886 	srl16,
887 	srli,
888 	srlri,
889 	srlr,
890 	srlv,
891 	ssnop,
892 	st,
893 	subqh,
894 	subqh_r,
895 	subq,
896 	subq_s,
897 	subsus_u,
898 	subsuu_s,
899 	subs_s,
900 	subs_u,
901 	subu16,
902 	subuh,
903 	subuh_r,
904 	subu,
905 	subu_s,
906 	subvi,
907 	subv,
908 	suxc1,
909 	sw,
910 	sw16,
911 	swc1,
912 	swc2,
913 	swc3,
914 	swl,
915 	swm16,
916 	swm32,
917 	swp,
918 	swr,
919 	swxc1,
920 	sync,
921 	synci,
922 	syscall,
923 	teq,
924 	teqi,
925 	tge,
926 	tgei,
927 	tgeiu,
928 	tgeu,
929 	tlbp,
930 	tlbr,
931 	tlbwi,
932 	tlbwr,
933 	tlt,
934 	tlti,
935 	tltiu,
936 	tltu,
937 	tne,
938 	tnei,
939 	trunc,
940 	v3mulu,
941 	vmm0,
942 	vmulu,
943 	vshf,
944 	wait,
945 	wrdsp,
946 	wsbh,
947 	xor,
948 	xor16,
949 	xori,
950 
951 	// some alias instructions
952 	nop,
953 	negu,
954 
955 	// special instructions
956 	jalr_hb, /// Jump and link with hazard barrier
957 	jr_hb, 	 /// Jump register with Hazard Barrier
958 }
959 
960 /// Group of Mips instructions
961 enum MipsInstructionGroupId {
962 	invalid = 0,
963 
964 	// Generic groups
965 	// All jump instructions (conditional+direct+indirect jumps)
966 	jump,
967 	// All call instructions
968 	call,
969 	// All return instructions
970 	ret,
971 	// All interrupt instructions (int+syscall)
972 	int_,
973 	// All interrupt return instructions
974 	iret,
975 	// All privileged instructions
976 	privilege,
977 	// All relative branching instructions
978 	branch_relative,
979 
980 	// Architecture-specific groups
981 	bitcount = 128,
982 	dsp,
983 	dspr2,
984 	fpidx,
985 	msa,
986 	mips32r2,
987 	mips64,
988 	mips64r2,
989 	seinreg,
990 	stdenc,
991 	swap,
992 	micromips,
993 	mips16mode,
994 	fp64bit,
995 	nonansfpmath,
996 	notfp64bit,
997 	notinmicromips,
998 	notnacl,
999 	notmips32r6,
1000 	notmips64r6,
1001 	cnmips,
1002 	mips32,
1003 	mips32r6,
1004 	mips64r6,
1005 	mips2,
1006 	mips3,
1007 	mips3_32,
1008 	mips3_32r2,
1009 	mips4_32,
1010 	mips4_32r2,
1011 	mips5_32r2,
1012 	gp32bit,
1013 	gp64bit,
1014 }